New Delhi, India, February 26, 2015: Xilinx has announced its 16nm UltraScale+ family of FPGAs, 3D ICs and MPSoCs, combining new memory, 3D-on-3D and multi-processing SoC (MPSoC) technologies, delivering a generation ahead of value. In addition, to enable an even higher level of performance and integration, the UltraScale+ family also includes a new interconnect optimization technology, SmartConnect. These devices extend Xilinx’s UltraScale portfolio – now spanning 20nm and 16nm FPGA, SoC and 3D IC devices – and leverage a significant boost in performance/watt from TSMC’s 16FF+ FinFET 3D transistors. Optimized at the system level, UltraScale+ delivers value far beyond a traditional process node migration – providing 2–5X greater system level performance/watt over 28nm devices, far more systems integration and intelligence, and the highest level of security and safety.
The newly extended Xilinx UltraScale+ FPGA portfolio comprises Xilinx’s market leading Kintex UltraScale+ FPGA and Virtex UltraScale+ FPGA and 3D IC families, while the Zynq UltraScale+ family includes the industry’s first all programmable MPSoCs. With this portfolio, Xilinx addresses a broad range of next generation applications, including LTE Advanced and early 5G wireless, terabit wired communications, automotive ADAS, and industrial Internet-of-Things (IoT) applications.
Memory Enhanced Programmable Devices: UltraRAM attacks one of the largest bottlenecks affecting FPGA- and SoC-based system performance and power by enabling SRAM integration. The new technology can be leveraged to create high capacity on-chip memory for a variety of use cases – including deep packet and video buffering – providing predictable latency and performance. By integrating massive amounts of embedded memory very close to the associated processing engines, designers can achieve greater system performance/watt and BOM cost reduction. UltraRAM scales up to 432 Mbits in a variety of configurations.
SmartConnect Technology: SmartConnect is a new and innovative interconnect optimization technology for FPGAs. It provides an additional 20-30% performance, area, and power advantages through intelligent system-wide interconnect optimization. While the UltraScale architecture attacks the silicon-level interconnect bottleneck through re-architected routing, clocking, and logic fabric, SmartConnect applies interconnect topology optimizations to match design-specific throughput and latency requirements while reducing interconnect logic area.
Industry’s First 3D on 3D Technology: The high end of the UltraScale+ portfolio leverages the combined power of 3D transistors and third generation of Xilinx 3D ICs. Just as FinFETs enable a non-linear improvement in performance/watt over planar transistors, 3D ICs enable a non-linear improvement in systems integration and bandwidth/watt over monolithic devices.
Heterogeneous Multi-processing Technology: The new Zynq UltraScale+ MPSoCs include all of the aforementioned FPGA technologies with an unprecedented level of heterogeneous multi-processing, deploying the “the right engines for the right tasks.” These new devices deliver approximately 5X system level performance/watt relative to previous alternatives. At the center of the processing-subsystem is the 64-bit quad-core ARM Cortex-A53 processor, capable of hardware virtualization, asymmetric processing, and full ARM TrustZone support.
The processing sub-system also includes a dual-core ARM Cortex-R5 real-time processor for deterministic operation, ensuring responsiveness, high throughput, and low latency for the highest levels of safety and reliability. A separate security unit enables military-class security solutions such as secure boot, key and vault management, and anti-tamper capabilities—standard requirements for machine-to-machine communication and industrial IoT applications.
For complete graphics acceleration and video compression/decompression, the new device incorporates an ARM Mali-400MP dedicated graphics processor as well as a H.265 video codec unit, combined with support for Displayport, MIPI and HDMI. Finally, dedicated platform and power management unit (PMU) has been added that supports system monitoring, system management and dynamic power gating of each of the processing engines.
“Xilinx is delivering a generation ahead of value with 16nm FinFET FPGAs and MPSoCs to a variety of next generation applications,” said Victor Peng, executive vice president and general manager of the Programmable Products Group at Xilinx. “Our new Ultrascale+ 16nm portfolio delivers 2-5X higher system performance/watt, a dramatic leap in system integration and intelligence, and the highest level of security and safety required by our customers. These capabilities enable Xilinx to significantly expand its available market.”
“TSMC’s ongoing collaboration with Xilinx has resulted in the realization of world class 16nm FinFET enabled products,” said Dr. B J Woo, TSMC vice president of Business Development. “Xilinx and TSMC have clearly demonstrated leading silicon performance with the lowest power consumption and highest system value.”
Early customer engagements are in process for all of the UltraScale+ families. First tape out and early access release of the design tools are scheduled for the second calendar quarter of 2015. First ship is scheduled for the fourth calendar quarter of 2015.